Join Us
λνμμ λ° νλΆ μ°κ΅¬μ λͺ¨μ§
Research Areas / μ°κ΅¬ λΆμΌ
AI & Next-Generation Computing System Optimization
AI & μ°¨μΈλ μ»΄ν¨ν μμ€ν μ΅μ ν
On-Device AI λ° LLMμ ν¨μ¨μ μ€νμ μν μμ μ μ½ λλ°μ΄μ€ μ΅μ ν κΈ°μ μ μ°κ΅¬ν©λλ€.
Key Publications
- β’ ReAx: Resource-efficient Asynchronous Execution for Accelerating LLM Fine-tuning at the Edge (IEEE ESL, 2026)
- β’ SQUAD: A Scalable Quantization Accelerator Toward Energy-Efficient On-Device QAT (IEEE Access, 2025)
- β’ Scale-CIM: Precision-Scalable Computing-in-Memory for Energy-Efficient Quantized Neural Networks (JSA, 2023)
Related News
- β’ μ μμ ν 'ν°μΉ' μ΅μν΄μ§λ― β¦ AIκ° λͺ¨λ κΈ°κΈ° κΈ°λ³Έκ°λ κ² β λ§€μΌκ²½μ , Jan. 2026
- β’ Why In-Memory Computation Is So Important For Edge AI β Semi Engineering, Oct. 2025
- β’ λ°λ체 μ μ λ ₯ κΈ°μ μ΄νβ¦ AIλ‘ μΈν μ λ ₯ λ¬Έμ ν΄κ²°μ΄ κ΄κ±΄ β μ‘°μ λΉμ¦, Sep. 2025
- β’ 'AI νμ₯Β·μ²¨λ¨ ν¨ν€μ§Β·μ§μ κ°λ₯μ±'... 2025 λ°λ체 μ κ³ 3λ ν€μλ β λμ§νΈν¬λ°μ΄, Jan. 2025
- β’ AI μλ 'κ³ μ±λ₯ λ©λͺ¨λ¦¬' κ°μκ° μμ₯ μ§λ°° β λμμΌλ³΄, Jan. 2024
High-Reliability Memory Systems & HBM Optimization
κ³ μ λ’° λ©λͺ¨λ¦¬ μμ€ν λ° HBM μ΅μ ν
HBM/DDR5 λ©λͺ¨λ¦¬μ RowHammer λ± μ λ’°μ± λ¬Έμ λ₯Ό ν΄κ²°νκ³ μ§λ₯ν λ©λͺ¨λ¦¬ κΈ°μ μ κ°λ°ν©λλ€.
Key Publications
- β’ SHIFT ECC: A Value Converting HBM ECC Approach for Refresh Energy Efficient Integer Quantized DNN Inference (ISLPED, 2025)
- β’ Bandwidth-Effective DRAM Cache for GPUs with Storage-Class Memory (HPCA, 2024)
- β’ Sparrow ECC: A Lightweight ECC Approach for HBM Refresh Reduction (ISLPED, 2024 (Best Paper))
- β’ ZEC ECC: A Zero-byte Eliminating Compression Based ECC Scheme (IEEE Access, 2024)
- β’ Twin ECC: A Data Duplication Based ECC for Strong DRAM Error Resilience (DATE, 2023)
- β’ Stealth ECC: A Data-Width Aware Adaptive ECC Scheme (DATE, 2022)
Related News
- β’ AIκ° μꡬνλ μλ‘μ΄ λ©λͺ¨λ¦¬ ꡬ쑰: HBMμ λμ΄ HBF μλλ‘ β λ€μ΄λ², Jan. 2026
- β’ μλΉλμ GPU, Rowhammer μ·¨μ½μ λ°κ²¬λΌβ¦AI μ°μ° λ° ν΄λΌμ°λ νκ²½μ μ¬κ°ν μν β λ°μΌλ¦¬μν, Jul. 2025
- β’ Understanding Memory's RowHammer Challenge β Electronic Design, Nov. 2024
- β’ JEDEC Extends DDR5 Memory Specification to 8800 MT/s, Adds Anti-Rowhammer Features β AnandTech, Apr. 2024
- β’ Memory's Future Hinges On Reliability β Semi Engineering, 2024
Low-Power Design & Thermal Management
μ μ λ ₯ μ€κ³ λ° μ΄ κ΄λ¦¬
Chiplet κΈ°λ° 2.5D/3D μ μΈ΅ μμ€ν λ° Edge AI λ°λ체μ μ΄ μ μ΄ λ° μν€ν μ² μ΅μ νλ₯Ό μ°κ΅¬ν©λλ€.
Key Publications
- β’ Quantifying the Impact of Monolithic 3D (M3D) Integration on L1 Caches (IEEE TETC, 2021)
- β’ M3D-based SRAM/MRAM Hybrid Memory for an Energy-efficient Unified L2 TLB-Cache (IEEE Access, 2021)
- β’ Monolithic 3D Stacked Multiply-Accumulate Units (VLSI Journal, 2021)
- β’ Exploring the Relation between M3D L1 GPU Cache Capacity and Warp Scheduling (ISLPED, 2019)
- β’ Thermal Modeling and Validation of a Real-World Mobile AP (IEEE D&T, 2018)
Related News
- β’ μΉ©λ Β·3D SoC κ° ν₯ν ν¨ν€μ§ μ°μ μ ν΅μ¬ κΈ°μ β λμΌλ , Feb. 2023
- β’ μΉ©λ μΌλ‘ μ§νν 4μΈλ μ μ¨ SP, μΈν λ―Έλμ μ€μνλ€ β ν ν¬λ μνΌ, Jan. 2023
- β’ λ°λ체 μ κ³, λ―ΈμΈ κ³΅μ νκ³β¦λμμΌλ‘ 'μΉ©λ ' κ°κ΄ β EPNC, Oct. 2022
- β’ What is 3D V-cache? β Dot Esports, 2023
- β’ λ°λ체 λ―ΈμΈν νκ³ λ°μ΄λμ μ κ³΅λ² 'M3D' β λμΌλ , 2019
Qualifications / μ§μ μ격
- βμ»΄ν¨ν° μν€ν μ² λ° μμ€ν μ λν λμ κ΄μ¬ (λ§€μ° μ€μ)
- βμ»΄ν¨ν° ꡬ쑰μ λν μ΄ν΄ λλ C/C++, Python νλ‘κ·Έλλ° λ₯λ ₯
- βλνμμ: νμ¬ λλ μμ¬ νμ μ·¨λ μμ μ
- βνλΆ μ°κ΅¬μ: μ¬ν μ€, 2νλ 1νκΈ° μ΄μ
Benefits / μ§μ μ¬ν
Graduate Students / λνμμ
- β’ λ±λ‘κΈ λ° μ°κ΅¬ μΈμΌν°λΈ μ§μ
- β’ κ°μΈ PC λ° μ°κ΅¬ μ₯λΉ μ 곡
- β’ μ°κ΅¬ κ³΅κ° μ 곡
- β’ νμ λ Όλ¬Έ λ° νΉν μ§λ
- β’ μ§λ‘ λ° μ§ν μλ΄
Undergraduate Interns / νλΆ μ°κ΅¬μ
- β’ κ°μΈ PC μ¬μ© κ°λ₯
- β’ μ°κ΅¬ μ°Έμ¬ μ₯νκΈ
- β’ μ·¨μ 컨μ€ν
- β’ νμ λ Όλ¬Έ λ° νΉν μ§λ
- β’ μ§λ‘ λ° μ§ν μλ΄
How to Apply / μ§μ λ°©λ²
곡μνΈ κ΅μμκ² μ΄λ©μΌλ‘ μ°λ½ν΄ μ£ΌμΈμ.
yhgong@ssu.ac.kr
μλ μλ£λ₯Ό ν¨κ» 보λ΄μ£Όμλ©΄ λ©λλ€:
- β’ κ°λ¨ν μκΈ°μκ° λ° μ°κ΅¬ κ΄μ¬ λΆμΌ
- β’ μ±μ μ¦λͺ μ
Lab: μ°½μκ΄ 306νΈ μ§λ₯νμ»΄ν¨ν ꡬ쑰μ°κ΅¬μ€